Artificial Intelligence (AI) applications are driving a growing demand for efficient hardware implementations. This seminar explores AI acceleration at the circuits and systems levels, focusing on key design strategies for optimizing performance, power, and area. We will discuss hardware accelerators such as GPUs, TPUs, and neuromorphic computing, along with innovations in digital and analog circuit design for AI workloads. Through practical examples, attendees will gain insights into how circuits and systems engineers contribute to the advancement of AI technologies. This seminar is designed for undergraduate students interested in the intersection of AI and hardware design.
* 10 IEEE and IEEE CASS Essential Student Memberships by 2025 for participating students.