Process Development and Reliability Investigations for Scaling 3D Interconnects in Advanced Semiconductor Packaging

Advanced semiconductor packaging is playing a crucial role to drive system performance and functionality. With the increasing demand for emerging and growing computing needs, heterogeneous three-dimensional (3D) integration with fine-pitch, high-density interconnections, and multi-chip stacks are very promising in the future. The aggressive interconnects pitch scaling and nanoscale via interconnections make the process development and reliability more and more challenging.

Advanced semiconductor packaging is playing a crucial role to drive system performance and functionality. With the increasing demand for emerging and growing computing needs, heterogeneous three-dimensional (3D) integration with fine-pitch, high-density interconnections, and multi-chip stacks are very promising in the future. The aggressive interconnects pitch scaling and nanoscale via interconnections make the process development and reliability more and more challenging.

IEEE-Affiliated Group Name: EPS

URL: https://resourcecenter.eps.ieee.org/education/webinars/epsvid1160