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Women-in-Engineering Seminar Series – Seminar 1

December 1, 2021 @ 1:00 pm11:46 pm

Abstract: Data stored in the cloud or on mobile devices reside in physical memory systems with finite sizes. Today, huge amounts of analog data, e.g., images, sounds and videos, are first converted into binary digital form and then information compression algorithms (source coding, e.g. the JPEG standard) and error-correcting codes (channel coding) are separately employed to minimize the amount of physical storage required.

In this talk, I will present a new concept for directly storing analog data in a compressed format into analog-valued memory. This new concept provides more efficient storage of analog data by combining the use of joint source channel coding (JSCC) from information theory with the use of emerging non-volatile memories (e.g., Phase-change Memory (PCM) and Resistive RAM (RRAM)) that can directly store analog values as continuously tuned physics properties (e.g., resistances). Specifically, I will describe how we develop an adaptive JSCC scheme with neural network for lossy image compression and storage in analog-valued non-volatile memory arrays. Our experiments using PCM and RRAM array chips show competitive performance for storing analog data using this concept. I will also show JSCC provides resilience to the PCM and RRAM device technology non-idealities, including defective cells, device variability, resistance drift, and relaxation. We ho`pe this work can open up new opportunities for addressing pressing demands for the storage of analog data.

Speaker bio: Xin Zheng is a final-year PhD student in Electrical Engineering at Stanford University, advised by Prof. H. -S. Philip Wong. She received her B.S. degree in Physics from Nanjing University, and her M.S. degree in Electrical Engineering from Stanford University. Her PhD research focuses on analog storage system enabled by emerging memory technologies (e.g., RRAM and PCM), with technical efforts spanning from memory device characterization and modeling, memory array chip design and tape-out, to analog signal coding scheme development.

Details

Date:
December 1, 2021
Time:
1:00 pm – 11:46 pm
Event Tags:
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Website:
https://events.vtools.ieee.org/m/291919
Region: Region 7 (Canada)
Affiliated Group Name: University Of Waterloo

Other

Region
Region 7 (Canada)
Affiliated Group Name
University Of Waterloo