There will be a presentation providing an overview of the main design verification methods for digital ASICs, within the context of a complete development roadmap. The focus will be on the emulation technique, highlighting its particularities and how it differs from other approaches such as simulation, prototyping, and formal verification.

Short Bio: Guilherme Resende Vieira holds a Bachelor’s degree in Computer Science from the Federal University of Minas Gerais (UFMG), with 7 years of experience as a Design Verification Engineer at Cadence Design Systems. He is currently working as a Lead Design Engineer, focusing on digital ASIC projects for Emulation.