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A to Z of Multilevel Inverters

April 11 @ 6:00 pm7:30 pm

Prof. Shravani Mathur, Secretary, IEEE IES Madhya Pradesh Section Chapter & Ambassador, IEEE Women-in-IES 2024-25, will introduce the speaker Dr. Albert Alexander, Professor, Vellore Institute of Technology, IEEE Madras Section. Here is the abstract of the talk.

Key Aspects of Multilevel Inverters

Core Concept: Unlike traditional 2-level inverters, MLIs create a staircase waveform, which approximates a sine wave more closely, reducing filtering requirements.

Main Topologies:

Diode-Clamped (Neutral Point Clamped – NPC): Uses clamping diodes to limit switch voltage stress.

Flying Capacitor (FC): Uses capacitors to clamp switch voltage.

Cascaded H-Bridge (CHB): Connects multiple H-bridges in series for higher voltage levels.

Advantages: Lower THD, reduced electromagnetic interference (EMI), higher power quality, and ability to operate at higher voltages.

Applications: Medium-voltage motor drives, renewable energy integration (solar/wind), HVDC transmission, and electric vehicle drives.

Control Strategies: Frequently use PWM (Pulse Width Modulation) techniques to manage switching

Details

Date:
April 11
Time:
6:00 pm – 7:30 pm
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  • Website:
    https://events.vtools.ieee.org/m/547136
    Affiliated Group Name: Madhya Pradesh Section Chapter,IE13

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    Affiliated Group Name
    Madhya Pradesh Section Chapter,IE13